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NXP Semiconductors /QN908XC /ADC /INT

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Interpret as INT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DAT_RDY_INT)DAT_RDY_INT 0 (WCMP_INT)WCMP_INT 0 (FIFO_OF_INT)FIFO_OF_INT 0 (ADC_INT)ADC_INT

Description

ADC interrupt status register

Fields

DAT_RDY_INT

Data ready interrupt will be cleared after fifo data is read can not be cleared by write 1.
WCMP_INT

Window compare interrupt.
FIFO_OF_INT

FIFO overflow interrupt.
ADC_INT

ADC interrupt.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data